The VCU daemon implements a safety validation model inspired by ISO 26262 ASIL design principles — operating at two independent layers with overlapping coverage.
Every incoming data frame passes three sequential checks. Any failure routes immediately to System Inhibit.
The system defaults to safe state. Any ambiguity, timeout, or discrepancy routes to System Inhibit. Normal operation is an earned state — not the default.
Four architectural patterns operating at firmware level — independent of and prior to the VCU-layer safety model above.
When a critical fault is detected at the embedded level, the BMS executes an atomic latch sequence borrowed from aerospace and industrial control:
This guarantees hardware isolation and fault logging in a single, uninterruptible operation. No nested interrupt or concurrent task can interfere between contactor isolation and fault logging.
During the CHARGE state, the BMS and VCU actively police the external EVSE rather than trusting it unconditionally. The system does not assume external power electronics will behave within specification.